Jobs in Fort Collins, CO

About the role

We’re looking for a Timing Engineer to join our silicon team. In this role, you’ll drive static timing analysis and closure for complex, high-performance designs. You’ll collaborate closely with logic, DFT, and physical design teams to debug constraints, optimize paths, and ensure our chips meet performance targets across corners and modes. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA .

What you'll bring

• Experienced in STA and passionate about enabling silicon to meet aggressive performance goals.
• Analytical and detail-oriented, with a strong understanding of timing paths, constraints, and optimization strategies.
• A collaborative team player who works well across logic, DFT, and physical design boundaries.
• Resourceful and self-driven, capable of developing scripts and methodologies that improve timing closure workflows.
• 7+ years of industry experience and a proven record of successful tapeouts.
• Deep knowledge of STA tools and techniques, including noise, crosstalk, and OCV analysis.
• Proficiency in writing and debugging SDC constraints, creating ECOs, and developing closure strategies.
• Strong scripting skills in Python, Perl, and TCL to support automation and flow development.
• Familiarity with SPICE modeling and worst-case corner analysis.

Locations