Staff Design Verification Engineer
Plano, TX, United States Hybrid
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About the role
Renesas is seeking an experienced Staff Verification Engineer. As mixed-mixed signal verification engineer you will be responsible for the verification and modeling of mixed-signal Automotive power management devices, including PMICs, switching regulators, and related analog IP. You will work closely with design, systems, validation, and CAD teams to drive successful development, integration, and sign-off of complex mixed-signal power chips. Renesas is seeking an experienced Staff Verification Engineer. You will work closely with design, systems, validation, and CAD teams to drive successful development, integration, and sign-off of complex mixed-signal power chips.
What you'll bring
- MS or PhD in Electrical Engineering, Computer Engineering, or related field
- 8+ years of experience in mixed-signal or analog circuit verification
- Deep understanding of all aspects of mixed-signal verification environment architecture and implementation
- Hands-on experience with Real Number Model (RNM) and AMS (Analog Mixed Signal) model integration
- Proficiency in RTL and behavioral simulation tools (e.g., Spectre, Xcelium)
- Strong understanding of Gate-Level Simulation (GLS) flows and ability to set up and debug GLS simulations
- Proven expertise debugging both analog blocks (switched-mode regulators, LDO, bandgap, reference circuits) and digital RTL
- Experience with automotive PMIC or power management IC design and verification
- Proficiency in Verilog, SystemVerilog, and/or SPICE-based languages
- Solid understanding of verification methodologies: UVM, assertions, coverage-driven verification
- Experience interfacing with multiple verification domains: functional, post-silicon, ATE test correlation
- Excellent problem-solving and debugging skills with strong analytical mindset